I will write, debug, and optimize custom firmware for esp32, stm32, or avr
Embedded Firmware Engineer ESP32, STM32, AVR and Hardware Debugging
About this Gig
Got a custom PCB or prototyping board that isn't behaving? Or are you a founder launching a connected product that requires rock-solid, predictable execution?
Whether you need a low-level register driver for an STM32, a high-throughput dual-core application on an ESP32, or a multi-threaded FreeRTOS system architecture, I deliver clean, production-ready code.
What This Solves For You:
- Legacy Code Rescue: I debug freezing microcontrollers, memory leaks, and broken peripheral timing loops.
- High-Throughput: Expert configuration of DMA, SPI, I2C, UART, and Modbus pipelines to prevent data loss.
- Zero-Jitter Scheduling: Robust FreeRTOS architecture using clean task prioritization, queues, and semaphores to completely avoid race conditions and system lockups.
- Lab-Verified Delivery: Every line of code is verified on actual hardware using an 8-channel logic analyzer and diagnostic tools to guarantee signal integrity before delivery.
Supported Architectures:
- ESP32 (ESP-IDF / Arduino)
- STM32 (HAL, Low-Layer, or Direct Register-Level)
- AVR (ATmega / ATtiny bare-metal)
Let's build something deterministic.
FAQ
Do you offer free revisions if I want to add a new feature?
This project covers the precise hardware scope agreed upon in our initial alignment chat. While structural changes or feature additions mid-project require a separate scope amendment, I offer a comprehensive Bug-Free Guarantee on the agreed scope.
What does your Bug-Free Guarantee mean?
It means absolute predictability for your budget. If the delivered firmware deviates from our agreed specifications under the specified operating conditions, I will modify the registers and logic at zero additional cost until it runs flawlessly.
Do I need to send you physical hardware?
In most cases, no. If you provide accurate component datasheets, schematics, and an explicit pinout map, I can replicate the bus logic and timing constraints using my lab setup to validate the firmware stack.

