I will implement and debug fpga designs in vhdl, sv or verilog

Abi

India

I speak English, German
I’m an FPGA/RTL Engineer with hands-on experience delivering digital hardware for 5G NR (High/Low PHY) and RISC-V–based accelerators. I’ve worked in industry roles across RTL design (VHDL/Verilog/Syst...
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About this Gig

FPGA Programming & RTL Design (VHDL / Verilog / SystemVerilog)


If you need help with FPGA development, RTL design, simulation/verification, or bring-up/debug, youre in the right place.


Im an FPGA/RTL Engineer with industry experience delivering digital hardware for 5G NR (High/Low PHY) and RISC-Vbased accelerator RTL. My work includes RTL design, simulation, STA/timing optimization, SoC/IP integration, and system/board bring-up across real-world projects


Services Offered

  • RTL design & implementation (VHDL / Verilog / SystemVerilog)
  • Testbench creation + RTL simulation (ModelSim / Cadence Xcelium)
  • Debugging & functionality verification (waveforms, logs, checks)
  • FPGA prototyping & integration using Xilinx Vivado (project setup, bitstream support)
  • Timing optimization / STA-driven fixes


Documentation & Handover

  • Clean, commented RTL
  • Simulation scripts/results
  • Integration notes (and constraints guidance when needed)


Please message me before placing an order Ill review your requirements and suggest the best package/scope (free consultation).

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implement and debug fpga designs in vhdl, sv or verilog
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implement and debug fpga designs in vhdl, sv or verilog
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implement and debug fpga designs in vhdl, sv or verilogimplement and debug fpga designs in vhdl, sv or verilogimplement and debug fpga designs in vhdl, sv or verilog

Platform:

FPGA

Sensors:

Microphone

•

Camera

•

Lidar

Expertise:

Firmware development

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Debugging

•

SoC optimization

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