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I will do fpga and vhdl development
HW SW Engineer, Pentester and Business developer
With 15+ years bridging deep tech and business, plus an M.B.A. in Analytical Finance (2022), I deliver secure, scalable solutions that drive real ROI for startups, scale-ups, fintech, and IoT/hardware...
About this Gig
My name is Aleksandar and I am an expert VHDL designer with over 8 years of experience in digital logic design.
I can help with architecture planning, RTL development, hardware acceleration, and everything you need to bring your digital system to market. Working with me, you will get professional VHDL/Verilog code and optimized logic designs for your professional product, industrial application, or DIY project.
Just send your functional requirements, state machine diagrams, or write down your concept. You can provide specific timing constraints, clock frequencies, and the target FPGA family to ensure the design fits your hardware perfectly.
I can provide everything you need for a production-ready digital system:
- Custom RTL in VHDL or Verilog
- Functional and Timing Simulation (ModelSim/Vivado)
- SoC Integration (Zynq, MicroBlaze, NIOS II)
- High-speed interfaces and DSP algorithms
- Constraints and Timing Closure (XDC/SDC)
- Detailed Documentation and Register Maps
- Complete Source Files and Bitstreams
Disclaimer: I do not provide the hardware. If you require testing on physical hardware, we must discuss the project quota and terms separately.
Feel free to contact me!
Platform:
FPGA
FAQ
Do you provide the physical FPGA hardware?
No, I provide the digital design files, including HDL code (VHDL/Verilog), constraints, and bitstreams. If you require the design to be tested on specific physical hardware that I have in-house, we can discuss a custom quota and terms for hardware verification.
Which FPGA vendors and software tools do you support?
I work with all major industry toolchains, including AMD/Xilinx (Vivado, Vitis, ISE), Intel/Altera (Quartus Prime), and Lattice (Diamond/Radiant). Please specify your target device and preferred software version when starting the project to ensure full compatibility.
How do you verify the design if you don't have my specific hardware?
Every project undergoes rigorous functional and timing simulation using professional testbenches in ModelSim, Questa, or Vivado Simulator. I provide simulation reports and waveform screenshots to prove the logic functions correctly and meets your timing requirements before delivery.
Can you help with SoC architectures like Zynq or MicroBlaze?
Yes. I have extensive experience in SoC (System-on-Chip) development. This includes configuring processor systems, designing custom AXI-mapped peripherals, and handling the hardware-to-software handoff. I can also provide basic driver code to interface your hardware with the processor.
Do you offer High-Level Synthesis (HLS) for hardware acceleration?
Yes, I offer HLS services using Xilinx Vitis HLS to convert C/C++ algorithms into optimized VHDL/Verilog RTL. I use pragmas for pipelining and memory mapping (AXI) to ensure high throughput and efficient resource utilization on your target FPGA fabric.
