I will do fpga rtl design in verilog and systemverilog uvm verification

Pakistan

I speak English

FPGA Engineer for RTL Design and UVM Verification

Welcome to my Digital Design & Verification profile. I am a VLSI/FPGA engineer specializing in front-end RTL Design and Advanced UVM Verification. Our Expertise: • RTL Design: Verilog/SystemVerilog, F...
About this Gig

Hi, I am a Digital Hardware and Verification Engineer. I design, optimize, and verify clean, synthesizable FPGA architectures based on your custom requirements, specs, or block diagrams. 


I proudly welcome all international clients, corporate teams, startups, and academic students from every culture. Whether you are an industry engineer launching a hardware module or a student tackling a tough digital design assignment, I am here to fully support your project with clear communication.


What I Deliver:

Custom FPGA RTL modules and hardware IP cores using Verilog & SystemVerilog

Robust FSMs, FIFOs, counters, timers, and high-speed data pipelines

Full integration of AXI, AHB, APB, SPI, UART, and Avalon DMA protocols

Verification Testbenches and functional simulations (Layered SV & Advanced UVM 1.2)

Concurrent SystemVerilog Assertions (SVA) and functional coverage closure

Thorough RTL debugging, syntax corrections, and timing verification


Tools & Software:

Intel Quartus Prime

QuestaSim / ModelSim

Platform Designer (QSYS)


Please contact me before ordering so we can review your project specs together!

Platform:

FPGA

Sensors:

Sound & vibration

•

Voltage detection

•

Camera

•

Position

Expertise:

Debugging

•

SoC optimization

•

Testing

My Portfolio