I will help with c verilog riscv asic fpga accelerator projects

My areas of expertise includes Forward Error Correction, Cryptography, Digital Signal Processing, Data Acquisition, Image Processing, Computer Architecture, Computer Network, hardware acceleration on Aritifical Intelligence, Communication, complex algorithms etc.

Experienced tools/IP's:

Hardware/System Description Languages: Verilog, SystemVerilog, SystemC, Chisel, SpincalHDL, SystemRDL.

Programming/Scripting Languages: C/C++, Java, Python, TCL, Perl, Make, BASH, CSH.

Logical simulation: VCS, NCVerilog, Modelsim, Questasim, Verilator.

Other professional tools: Spyglass, Design Compiler, Symplify, Formality, PrimeTime.

Debugging tools: Verdi, Chipscope, PSL/SVA, GDB.

Embedded CPU cores/ISA's: RISCV, ARM, ARC, Leon3(SparcV8), LetticeMico32, Microblaze, 8051.

SOC interfaces: AMBA (AHB, APB, AXI, etc), Wishbone, Tilelink.

Peripheral interfaces: PCIE, DDR, SATA/SAS, USB, I2C, UART, SPI, GMII/MII/SGMII/RGMII/RMII, JTAG, etc.

FPGA Environment: Vivado HLS.

What do you get?

High quality design and code.

Easy to read and maintain project.