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I will help you implement simple xilinx fpga based hdl project
FPGA, Python, Linux and Business process modeling
A multidisciplinary developer. I have been based in Moscow (Russian Federation) until recent events. Now relocated to Algeria. I have expertise in various engineering fields including FPGA development...
About this Gig
I'm an experienced HDL (Hardware Description Language) designer with years of work in education and real-world tech projectsespecially in telecom, digital signal processing, and data systems.
This Gig is perfect for students, beginners, or anyone working on small FPGA projects.
This Gig is for:
- Basic low-speed digital interfaces
- Simple control logic using state machines
- Small designs that fit in a Xilinx Artix-7 FPGA
- Intro-level assignments or hobby projects
This Gig does NOT include:
- Complex systems with processors or SoC
- High-speed communication interfaces
- Designs needing external memory or advanced IP blocks
What Youll Get:
- Help reviewing and improving your project idea
- Easy-to-understand SystemVerilog code
- A simple testbench and simulation setup
- Full FPGA implementation (synthesis, timing, bitstream)
- A demo on real hardware if I have the board
- Help with debugging
- Clear documentation and guidance on tools and workflow
Message me before ordering so I can make sure your project gets the best possible support.
Lets bring your first HDL project to life!
Platform:
FPGA
Expertise:
Firmware development
•
Debugging
•
Testing
•
Other
FAQ
What tools are used?
The following tools are used: - Xilinx Vivado in non-project script mode. - Icarus verilog and cocotb for functional verification. - Visual studio code for source code entry and management.
What languages are used?
The design subset of System verilog is used as the main HDL. Python as well as SystemVerilog are used for verification.
Are advanced verification frameworks supported?
No. Advanced verification frameworks such as VMM, OVM and UVM are not supported. Instead, the open source python-based cocotb (COroutine based COsimulation TestBench) is used.
What if I have an idea that doesn't fit into this Gig?
I love great ideas and fun projects! Just write me a word about the project. Better if you have some detailed specs. I'm sure that we will find a way to get it done.
Does the basic package implies programming a bitstream and hardware debug?
No. TBD
