I will design an i2c, spi or uart controller for your fpga

Pakistan

I speak Urdu, English

RTL Verification and FPGA Design Engineer

ASIC Design and Verification Engineer with 3+ years of industry experience in RTL verification and timing closure, including a 12nm tape-out. I help hardware teams, startups and students verify digita...
About this Gig

I design and verify serial protocol controllers in Verilog/SystemVerilog, targeting Xilinx FPGAs with Vivado.

What you get:

  • Synthesizable RTL for I2C, SPI or UART (master/slave as needed)
  • Self-checking testbench and simulation results
  • Configurable parameters (baud rate, clock divider, data width)
  • Vivado-ready files and a short integration guide

Ive built these controllers into a working memory-mapped system on Artix-7. Tell me the protocol, clock frequency and any special requirements.

Platform:

FPGA

Sensors:

Temperature

Expertise:

RTOS

•

Debugging

•

SoC optimization

•

Microcontrollers

•

ROS