I will write, simulate and debug riscv assembly code and isa based designs

Pakistan

I speak Urdu, English

45 orders completed

Engineer

I am an Electronics Engineer with expertise in FPGA development and RISC processor design. I offer services like FPGA programming, custom module creation, and system integration using tools such as Vi...

Level 1

Has met certain performance criteria and shows strong potential in the marketplace.

About this Gig

Looking for expert help with RISC-V assembly programming, simulation, or code integration? I provide clean, efficient, and well-structured low-level development using the RISC-V instruction set.

I specialize in writing and simulating RISC-V assembly code using both lightweight educational tools like RARS and Venus, as well as professional toolchains such as the RISC-V GNU toolchain, Spike and Verilator.


Services include:

  • Writing optimized and readable RISC-V assembly code (RV32I, RV64I, M, F)
  • Simulating code using RARS, Venus, or Spike
  • Instruction-level debugging and trace analysis
  • Developing test sequences for core validation or firmware-level integration
  • Creating startup routines, memory layout, and I/O interaction (if supported)
  • Delivering code that runs on both educational and professional platforms

Tools Supported:

  • RARS (RISC-V Assembler and Runtime Simulator)
  • Venus (Web-based RISC-V simulator)
  • Spike, GDB, and riscv64-unknown-elf-gcc
  • Verilator (for RTL testing)
  • Linux, Make, Git


Platform:

FPGA

Sensors:

Camera

Expertise:

Debugging

SoC optimization

Microcontrollers

Testing

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