I will develop h265 hevc and h266 vvc video codec rtl modules

I am an RTL Design Engineer at the NUST Chip Design Centre (NCDC) with professional experience in developing hardware architectures for H.265 (HEVC) and H.266 (VVC) video encoders.

I specialize in creating efficient, synthesizable RTL using Verilog and SystemVerilog for FPGA and ASIC implementations.

Services Offered

• H.265 (HEVC) hardware modules
• H.266 (VVC) hardware modules
• CABAC entropy coding
• Intra prediction
• Transform and Quantization
• RTL implementation
• Hardware optimization
• FPGA prototyping
• ASIC front-end development
• RTL debugging
• Testbench development
• Functional verification

What You Will Receive

• Clean and synthesizable RTL
• Well-documented source code
• Simulation and verification support
• Optimized hardware implementation
• Professional communication
• On-time delivery