I will do systemverilog, c, and riscv assembly related projects
Electrical Engineer C Python RISCV and Digital Product Design
About this Gig
Hi! I'm Muhammad Nasir, an Electrical Engineer.
Looking for a professional RISC-V engineer for processor design, verification, or low-level programming?
I specialize in RISC-V processor development, covering RISC-V SystemVerilog, RISC-V assembly, C programming, and computer architecture. I help students, researchers, and startups turn specifications into working, verified designs.
Whether you need a simple core, pipeline design, cache concepts, or verification support, I deliver clean, well-documented, and simulation-ready results.
Core Expertise
- RISC-V processor (single-cycle, multi-cycle, pipelined)
- RISC-V SystemVerilog RTL & testbenches
- RISC-V assembly programming & debugging
- C programming for low-level & embedded systems
- Datapath, control unit, FSM design
- Cache basics & memory hierarchy concepts
- Computer architecture tutoring & project support
Why Choose Me?
- Clear technical communication (no vague answers)
- Industry-style RTL and verification practices
- On-time delivery with structured outputs
- Strong debugging & problem-solving mindset
- Ideal for university projects, research, and startups
Note: Discuss before placing order
FAQ
Do you help with university assignments?
Yes. I support learning and understanding, and I explain the design clearly so you can confidently present your work.
Can you debug my existing RISC-V code?
Absolutely. Debugging RTL, assembly, and C code is one of my strengths.
Which simulators do you support?
I support common simulators such as ModelSim, Questa, Vivado and Verilator
Do you provide explanations?
Yes. I include clear explanations and comments, especially useful for students and reviewers.
Can you design from a PDF or spec?
Yes. I can convert specifications into working RTL designs.
Other questions?
Please feel free to reach out me to discuss
