I will assist with verilog vhdl dsp risc v fpga implementation using vivado quartus

Hi, thanks for reaching out. I am a FPGA design engineer have 2 year experience on industrial FPGA projects .I am here to solve Digital system design Problems, code conversion C to Verilog, Processor design and DSP algorithm implementation on FPGA boards . I worked with different FPGA boards ,Spartan 6. nexys-Artix A7, DE1-SOC, SDR chips.

I have a strong grip on data flow, gate level ,behavioral modelling using Verilog and VHDL for:

1-DSP algorithms real time implementation

2-Digital communication system implementation

3- Processor design complete pipelined with control hazards, data hazard exceptions and interrupts handling unit. Already worked on vector processor , RISC-V , Mips 32-bit, LC-3b etc..

4-modules sensors FPGA interfacing (ultrasonic, mipi csi-2 bridge, UART MATLAB interfacing ).

5-Timing reports

6-Bit-stream file

7-state machine Design

Following boards that I have used and available :

1-Zybo Z7: Zynq-7000 ARM/FPGA SoC

2-DE1-SOC,

3- Zynq-7000 ARM/FPGA SoC

4- Spartan-6

5-Nexys A7

I am available for any type of query and projects discussion . Feel free to discuss