I will design, simulate, and debug fpga systems in verilog and vhdl
About this Gig
Hi, I'm Rana, an Electrical Engineering student specializing in Embedded Systems and Digital Design, with hands-on experience in Verilog, VHDL, and FPGA-based digital logic design.
**I OFFER:**
- Verilog & VHDL coding / RTL design
- Digital logic design and simulation (combinational & sequential circuits)
- Finite State Machine (FSM) design
- Testbench development and simulation verification
- Advanced verification using cocotb and pyuvm (Python-based UVM)
- Debugging and optimization of existing Verilog/VHDL code
**HOW I WORK:**
I start by understanding your requirements, then write clean, well-commented, synthesis-ready code. Every module is simulated and verified with a proper testbench before delivery, so you get a working, tested design not just source code.
**TOOLS I USE:**
ModelSim, GTKWave, Icarus Verilog, Xilinx Vivado, Intel Quartus, cocotb, pyuvm
**WHAT YOU GET:**
- Source code
- Testbench
- Simulation results/waveforms
- Documentation
**WHY CHOOSE ME:**
- Clear communication and quick responses
- Clean, well-structured code with comments
- Modern verification methods (cocotb/pyuvm) alongside traditional testbenches
- Assignments, coursework, and prof
Platform:
FPGA
Sensors:
Accelerometer
•
Camera
•
Lidar
Expertise:
Debugging
•
SoC optimization
•
Signal processing

