I will design fpga rtl in verilog or vhdl with simulation and testbench

A. Yasir

Pakistan

I speak English

FPGA Design and Embedded Systems Engineer

Electrical Engineer specializing in FPGA design, RTL development, and embedded systems. I help clients turn specifications into reliable Verilog and VHDL implementations using Xilinx Vivado/ISE and In...
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About this Gig

Welcome to my FPGA design gig. I design reliable RTL and digital logic in Verilog or VHDL for academic, prototyping, and real-world hardware projects.


This gig is a good fit if you need:

- Custom RTL modules and finite state machines

- UART, SPI, I2C, AXI, memory, or sensor integration

- Testbench development, simulation, and waveform verification

- Timing-aware optimization for Xilinx or Intel/Altera devices

- Clean documentation and practical communication throughout the project


Tools I use:

- Xilinx Vivado / ISE

- Intel Quartus Prime

- ModelSim / QuestaSim


Deliverables can include synthesizable RTL, testbench files, simulation results, and timing or resource reports based on your requirements.


Please message me before ordering with your target FPGA or board, required interfaces, project scope, and deadline. That lets me confirm feasibility, pricing, and delivery time before we start.

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design fpga rtl in verilog or vhdl with simulation and testbench
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Platform:

FPGA

Expertise:

Firmware development

•

SoC optimization

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